The typical construction of a chamber for depositing a layer on a semiconductor wafer by means of CVD is described, for example, in U.S. Pat. No. 6,325,858 B1. The chamber is divided into an upper half and into a lower half. The upper half is closed off by a cover, also called an upper dome. The cover comprises a base which forms the side wall of the cover and a window composed of quartz that is transparent to thermal radiation. The base is on a side wall of the chamber which is provided with a gas inlet opening and a gas outlet opening arranged opposite the latter. Situated between the upper half and the lower half of the chamber is a susceptor that receives the semiconductor wafer to be coated. The susceptor is held by a rack with spider-type arms and can be raised, lowered and rotated with the aid of the rack. The lower half of the chamber is closed off by a baseplate similar to the cover, said baseplate likewise being transparent to thermal radiation. Lamps arranged above the cover and below the base plate are activated in order to deposit a layer on a semiconductor wafer placed into the chamber. The deposition gas is conducted through the gas inlet opening to the gas outlet opening and over the semiconductor wafer on this path. In this case, it flows through a channel bounded by the window at the top.
One of the challenges when depositing a layer on a semiconductor wafer by means of CVD is the requirement that the deposited layer is intended to have a layer thickness that is as uniform as possible. One measure of assessing the variation of the layer thickness is the range, defined as the difference between the maximum thickness tmax and the minimum thickness tmin of the layer. The parameter R derived therefrom describes the ratio of half of this difference and the mean thickness tm in percent and is calculated according to the formula R=100%*(tmax−tmin)/2*tm. Accordingly, the layer thickness is all the more uniform, the smaller the value of R.
US 2002/0020358 A1 describes improving the uniformity of the thickness of a layer deposited by means of CVD. The method described therein comprises producing a particular reaction zone (“prewafer reaction layer”) that combats an excessive layer growth in the edge region of the semiconductor wafer, which is known as the “edge effect”.